Memory

The nRF52805 contains flash and RAM that can be used for code and data storage.

The amount of RAM and flash differs depending on variant, see Memory variants.

Table 1. Memory variants
Device name	RAM	Flash
nRF52805-CAAA	24 kB	192 kB

The CPU and peripherals with EasyDMA can access memory via the AHB multilayer interconnect. The CPU is also able to access peripherals via the AHB multilayer interconnect, as illustrated in Memory layout.

Figure 1. Memory layout

See AHB multilayer and EasyDMA for more information about the AHB multilayer interconnect and the EasyDMA.

The same physical RAM is mapped to both the Data RAM region and the Code RAM region. It is up to the application to partition the RAM within these regions so that one does not corrupt the other.

RAM - Random access memory

The RAM interface is divided into three RAM AHB slaves.

RAM AHB slaves 0 to 2 are connected to two 4 kB RAM sections each, as shown in Memory layout.

Each RAM section has separate power control for System ON and System OFF mode operation, which is configured via RAM register (see the POWER — Power supply).

Flash - Non-volatile memory

The flash can be read an unlimited number of times by the CPU, but it has restrictions on the number of times it can be written and erased, and also on how it can be written.

Writing to flash is managed by the non-volatile memory controller (NVMC), see NVMC — Non-volatile memory controller.

The flash is divided into multiple 4 kB pages that can be accessed by the CPU via both the ICODE and DCODE buses as shown in, Memory layout. Each page is divided into 8 blocks.

Memory map

The complete memory map is shown in Memory map. As described in Memory, Code RAM and Data RAM are the same physical RAM.

Figure 2. Memory map

Instantiation

Table 2. Instantiation table
ID	Base address	Peripheral	Instance	Description
0	0x40000000	APPROTECT	APPROTECT	APPROTECT control
0	0x40000000	BPROT	BPROT	Block protect
0	0x40000000	CLOCK	CLOCK	Clock control
0	0x40000000	POWER	POWER	Power control
0	0x50000000	GPIO	P0	General purpose input and output
1	0x40001000	RADIO	RADIO	2.4 GHz radio
2	0x40002000	UART	UART0	Universal asynchronous receiver/transmitter	Deprecated
2	0x40002000	UARTE	UARTE0	Universal asynchronous receiver/transmitter with EasyDMA
3	0x40003000	TWI	TWI0	Two-wire interface master	Deprecated
3	0x40003000	TWIM	TWIM0	Two-wire interface master
3	0x40003000	TWIS	TWIS0	Two-wire interface slave
4	0x40004000	SPI	SPI0	SPI master	Deprecated
4	0x40004000	SPIM	SPIM0	SPI master
4	0x40004000	SPIS	SPIS0	SPI slave
6	0x40006000	GPIOTE	GPIOTE	GPIO tasks and events
7	0x40007000	SAADC	SAADC	Analog-to-digital converter
8	0x40008000	TIMER	TIMER0	Timer 0
9	0x40009000	TIMER	TIMER1	Timer 1
10	0x4000A000	TIMER	TIMER2	Timer 2
11	0x4000B000	RTC	RTC0	Real-time counter 0
12	0x4000C000	TEMP	TEMP	Temperature sensor
13	0x4000D000	RNG	RNG	Random number generator
14	0x4000E000	ECB	ECB	AES Electronic Codebook (ECB) mode block encryption
15	0x4000F000	CCM	CCM	AES CCM mode encryption
15	0x4000F000	AAR	AAR	Accelerated address resolver
16	0x40010000	WDT	WDT	Watchdog timer
17	0x40011000	RTC	RTC1	Real-time counter 1
18	0x40012000	QDEC	QDEC	Quadrature decoder
20	0x40014000	EGU	EGU0	Event generator unit 0
20	0x40014000	SWI	SWI0	Software interrupt 0
21	0x40015000	EGU	EGU1	Event generator unit 1
21	0x40015000	SWI	SWI1	Software interrupt 1
22	0x40016000	SWI	SWI2	Software interrupt 2
23	0x40017000	SWI	SWI3	Software interrupt 3
24	0x40018000	SWI	SWI4	Software interrupt 4
25	0x40019000	SWI	SWI5	Software interrupt 5
30	0x4001E000	NVMC	NVMC	Non-volatile memory controller
31	0x4001F000	PPI	PPI	Programmable peripheral interconnect
N/A	0x10000000	FICR	FICR	Factory information configuration
N/A	0x10001000	UICR	UICR	User information configuration