UICR — User information configuration registers

The user information configuration registers (UICRs) are non-volatile memory (NVM) registers for configuring user-specific settings.

For information on writing UICR registers, see the NVMC — Non-volatile memory controller and Memory chapters.

Registers

Table 1. Instances
Base addressPeripheralInstanceDescriptionConfiguration
0x10001000UICRUICR

User information configuration

  
Table 2. Register overview
RegisterOffsetDescription
UNUSED00x000 

Reserved

UNUSED10x004 

Reserved

UNUSED20x008 

Reserved

UNUSED30x010 

Reserved

NRFFW[0]0x014

Reserved for Nordic firmware design

 
NRFFW[1]0x018

Reserved for Nordic firmware design

 
NRFFW[2]0x01C

Reserved for Nordic firmware design

 
NRFFW[3]0x020

Reserved for Nordic firmware design

 
NRFFW[4]0x024

Reserved for Nordic firmware design

 
NRFFW[5]0x028

Reserved for Nordic firmware design

 
NRFFW[6]0x02C

Reserved for Nordic firmware design

 
NRFFW[7]0x030

Reserved for Nordic firmware design

 
NRFFW[8]0x034

Reserved for Nordic firmware design

 
NRFFW[9]0x038

Reserved for Nordic firmware design

 
NRFFW[10]0x03C

Reserved for Nordic firmware design

 
NRFFW[11]0x040

Reserved for Nordic firmware design

 
NRFFW[12]0x044

Reserved for Nordic firmware design

 
NRFHW[0]0x050

Reserved for Nordic hardware design

 
NRFHW[1]0x054

Reserved for Nordic hardware design

 
NRFHW[2]0x058

Reserved for Nordic hardware design

 
NRFHW[3]0x05C

Reserved for Nordic hardware design

 
NRFHW[4]0x060

Reserved for Nordic hardware design

 
NRFHW[5]0x064

Reserved for Nordic hardware design

 
NRFHW[6]0x068

Reserved for Nordic hardware design

 
NRFHW[7]0x06C

Reserved for Nordic hardware design

 
NRFHW[8]0x070

Reserved for Nordic hardware design

 
NRFHW[9]0x074

Reserved for Nordic hardware design

 
NRFHW[10]0x078

Reserved for Nordic hardware design

 
NRFHW[11]0x07C

Reserved for Nordic hardware design

 
CUSTOMER[0]0x080

Reserved for customer

 
CUSTOMER[1]0x084

Reserved for customer

 
CUSTOMER[2]0x088

Reserved for customer

 
CUSTOMER[3]0x08C

Reserved for customer

 
CUSTOMER[4]0x090

Reserved for customer

 
CUSTOMER[5]0x094

Reserved for customer

 
CUSTOMER[6]0x098

Reserved for customer

 
CUSTOMER[7]0x09C

Reserved for customer

 
CUSTOMER[8]0x0A0

Reserved for customer

 
CUSTOMER[9]0x0A4

Reserved for customer

 
CUSTOMER[10]0x0A8

Reserved for customer

 
CUSTOMER[11]0x0AC

Reserved for customer

 
CUSTOMER[12]0x0B0

Reserved for customer

 
CUSTOMER[13]0x0B4

Reserved for customer

 
CUSTOMER[14]0x0B8

Reserved for customer

 
CUSTOMER[15]0x0BC

Reserved for customer

 
CUSTOMER[16]0x0C0

Reserved for customer

 
CUSTOMER[17]0x0C4

Reserved for customer

 
CUSTOMER[18]0x0C8

Reserved for customer

 
CUSTOMER[19]0x0CC

Reserved for customer

 
CUSTOMER[20]0x0D0

Reserved for customer

 
CUSTOMER[21]0x0D4

Reserved for customer

 
CUSTOMER[22]0x0D8

Reserved for customer

 
CUSTOMER[23]0x0DC

Reserved for customer

 
CUSTOMER[24]0x0E0

Reserved for customer

 
CUSTOMER[25]0x0E4

Reserved for customer

 
CUSTOMER[26]0x0E8

Reserved for customer

 
CUSTOMER[27]0x0EC

Reserved for customer

 
CUSTOMER[28]0x0F0

Reserved for customer

 
CUSTOMER[29]0x0F4

Reserved for customer

 
CUSTOMER[30]0x0F8

Reserved for customer

 
CUSTOMER[31]0x0FC

Reserved for customer

 
NRFMDK[0]0x100

Reserved for Nordic MDK

 
NRFMDK[1]0x104

Reserved for Nordic MDK

 
NRFMDK[2]0x108

Reserved for Nordic MDK

 
NRFMDK[3]0x10C

Reserved for Nordic MDK

 
NRFMDK[4]0x110

Reserved for Nordic MDK

 
NRFMDK[5]0x114

Reserved for Nordic MDK

 
NRFMDK[6]0x118

Reserved for Nordic MDK

 
NRFMDK[7]0x11C

Reserved for Nordic MDK

 
PSELRESET[0]0x200

Mapping of the nRESET function (see POWER chapter for details)

 
PSELRESET[1]0x204

Mapping of the nRESET function (see POWER chapter for details)

 
APPROTECT0x208

Access port protection

 

NRFFW[n] (n=0..12)

Address offset: 0x014 + (n × 0x4)

Reserved for Nordic firmware design

Bit number313029282726252423222120191817161514131211109876543210
IDAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

NRFFW

  

Reserved for Nordic firmware design

NRFHW[n] (n=0..11)

Address offset: 0x050 + (n × 0x4)

Reserved for Nordic hardware design

Bit number313029282726252423222120191817161514131211109876543210
IDAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

NRFHW

  

Reserved for Nordic hardware design

CUSTOMER[n] (n=0..31)

Address offset: 0x080 + (n × 0x4)

Reserved for customer

Bit number313029282726252423222120191817161514131211109876543210
IDAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

CUSTOMER

  

Reserved for customer

NRFMDK[n] (n=0..7)

Address offset: 0x100 + (n × 0x4)

Reserved for Nordic MDK

Bit number313029282726252423222120191817161514131211109876543210
ID

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

NRFMDK

  

Reserved for Nordic MDK

PSELRESET[n] (n=0..1)

Address offset: 0x200 + (n × 0x4)

Mapping of the nRESET function (see POWER chapter for details)

All PSELRESET registers have to contain the same value for a pin mapping to be valid. If values are not the same, there will be no nRESET function exposed on a GPIO. As a result, the device will always start independently of the levels present on any of the GPIOs.

Bit number313029282726252423222120191817161514131211109876543210
IDC                         AAAAA
Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

PIN

 

21

GPIO pin number onto which nRESET is exposed

CRW

CONNECT

  

Connection

   

Disconnected

1

Disconnect

   

Connected

0

Connect

APPROTECT

Address offset: 0x208

Access port protection

Bit number313029282726252423222120191817161514131211109876543210
ID                        AAAAAAAA
Reset 0xFFFFFFFF11111111111111111111111111111111
IDAccessFieldValue IDValueDescription
ARW

PALL

  

Enable or disable access port protection.

See Debug for more information.

   

Disabled

0xFF

Hardware disable of access port protection for devices where access port protection is controlled by hardware

   

HwDisabled

0x5A

Hardware disable of access port protection for devices where access port protection is controlled by hardware and software

   

Enabled

0x00

Enable