Pin assignments

The pin assignment figures and tables describe the pinouts for the product variants of the chip.

The nRF52840 device provides flexibility regarding GPIO pin routing and configuration. However, some pins have limitations or recommendations for pin configurations and uses.

aQFN73 ball assignments

The ball assignment figure and table in the following section describe the assignments for this variant of the chip.

Figure 1. aQFN73™ ball assignments, top view

aQFN73 ball assignments

Table 1. aQFN73 ball assignments
PinNameFunctionDescriptionRecommended usage
A8

P0.31

AIN7

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A10

P0.29

AIN5

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A12

P0.02

AIN0

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A14P1.15Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
A16P1.13Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
A18DEC2Power1.3 V regulator supply decoupling
A20P1.10Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
A22VDDPowerPower supply
A23XC2Analog inputConnection for 32 MHz crystal
B1VDDPowerPower supply
B3DCCPowerDC/DC converter output
B5DEC4Power1.3 V regulator supply decouplingMust be connected to DEC6 (pin E24)
B7VSSPowerGround
B9

P0.30

AIN6

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
B11

P0.28

AIN4

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
B13

P0.03

AIN1

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
B15P1.14Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
B17P1.12Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
B19P1.11Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
B24XC1Analog inputConnection for 32 MHz crystal
C1DEC1Power1.1 V regulator supply decoupling
D2

P0.00

XL1

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

D23DEC3PowerPower supply, decoupling
E24DEC6Power1.3 V regulator supply decouplingMust be connected to DEC4 (pin B5)
F2

P0.01

XL2

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

F23VSS_PAPowerGround (radio supply)
G1P0.26Digital I/OGeneral purpose I/O
H2P0.27Digital I/OGeneral purpose I/O
H23ANTRFSingle-ended radio antenna connectionSee Reference circuitry for guidelines on how to ensure good RF performance
J1

P0.04

AIN2

Digital I/O

Analog input

General purpose I/O

Analog input

J24

P0.10

NFC2

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
K2

P0.05

AIN3

Digital I/O

Analog input

General purpose I/O

Analog input

L1P0.06Digital I/OGeneral purpose I/O
L24

P0.09

NFC1

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
M2

P0.07

TRACECLK

Digital I/O

Trace clock

General purpose I/O

Trace buffer clock

N1P0.08Digital I/OGeneral purpose I/O
N24

DEC5

Not connected

Power

1.3 V regulator supply decoupling for build codes Dxx and earlier.

Not connected for build codes Fxx and later.

P2P1.08Digital I/OGeneral purpose I/O
P23P1.07Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
R1

P1.09

TRACEDATA3

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[3]

R24P1.06Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
T2

P0.11

TRACEDATA2

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[2]

T23P1.05Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
U1

P0.12

TRACEDATA1

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[1]

U24P1.04Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
V23P1.03Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
W1VDDPowerPower supply
W24P1.02Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
Y2VDDHPowerHigh voltage power supply
Y23P1.01Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
AA24SWDCLKDebugSerial wire debug clock input for debug and programming
AB2DCCHPowerDC/DC converter output
AC5DECUSBPowerUSB 3.3 V regulator supply decoupling
AC9P0.14Digital I/OGeneral purpose I/O
AC11P0.16Digital I/OGeneral purpose I/O
AC13

P0.18

nRESET

Digital I/O

General purpose I/O

Configurable as pin RESET

QSPI/CSN
AC15P0.19Digital I/OGeneral purpose I/OQSPI/SCK
AC17P0.21Digital I/OGeneral purpose I/OQSPI
AC19P0.23Digital I/OGeneral purpose I/OQSPI
AC21P0.25Digital I/OGeneral purpose I/O
AC24SWDIODebugSerial wire debug I/O for debug and programming
AD2VBUSPower5 V input for USB 3.3 V regulator
AD4D-USBUSB D-
AD6D+USBUSB D+
AD8P0.13Digital I/OGeneral purpose I/O
AD10P0.15Digital I/OGeneral purpose I/O
AD12P0.17Digital I/OGeneral purpose I/O
AD14VDDPowerPower supply
AD16P0.20Digital I/OGeneral purpose I/O
AD18P0.22Digital I/OGeneral purpose I/OQSPI
AD20P0.24Digital I/OGeneral purpose I/O
AD22

P1.00

TRACEDATA0

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[0]

Serial wire output (SWO)

QSPI
AD23VDDPowerPower supply
Die padVSSPowerGround padExposed die pad must be connected to ground (VSS) for proper device operation
Note: For more information on standard drive, see GPIO — General purpose input/output. Low frequency I/O is a signal with a frequency up to 10 kHz.

QFN48 pin assignments

The pin assignment figure and table describe the assignments for this variant of the chip.

Note: VDD and VDDH are shortcircuited inside the package. Therefore the device is only usable in Normal Voltage supply mode, and not High Voltage supply mode.
Figure 2. QFN48 pin assignments, top view


Table 2. QFN48 pin assignments
PinNameFunctionDescriptionRecommended usage
Left side of the chip
1DEC1Power1.1 V Digital supply decoupling
2

P0.00

XL1

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

3

P0.01

XL2

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

4

P0.04

AIN2

Digital I/O

Analog input

General purpose I/O

Analog input

5

P0.05

AIN3

Digital I/O

Analog input

General purpose I/O

Analog input

6

P0.07

TRACECLK

Digital I/O

Trace clock

General purpose I/O

Trace buffer clock

7P0.08Digital I/OGeneral purpose I/O
8P1.08Digital I/OGeneral purpose I/O
9

P1.09

TRACEDATA3

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[3]

10

P0.11

TRACEDATA2

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[2]

11

P0.12

TRACEDATA1

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[1]

12VDDPowerPower supply
Bottom side of chip
13P0.13Digital I/OGeneral purpose I/O
14P0.14Digital I/OGeneral purpose I/O
15P0.17Digital I/OGeneral purpose I/O
16

P0.18

nRESET

Digital I/O

General purpose I/O

Configurable as pin RESET

QSPI/CSN
17VDDPowerPower supply
18P0.19Digital I/OGeneral purpose I/OQSPI/SCK
19P0.20Digital I/OGeneral purpose I/O
20P0.21Digital I/OGeneral purpose I/OQSPI
21P0.22Digital I/OGeneral purpose I/OQSPI
22P0.23Digital I/OGeneral purpose I/OQSPI
23P0.24Digital I/OGeneral purpose I/O
24

P1.00

TRACEDATA0

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[0]

Serial wire output (SWO)

QSPI
Right side of the chip
25VDDPowerPower supply
26SWDIODebugSerial wire debug I/O for debug and programming
27SWDCLKDebugSerial wire debug clock input for debug and programming
28NCNot connected
29

P0.09

NFC1

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
30

P0.10

NFC2

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
31ANTRFSingle-ended radio antenna connectionSee Reference circuitry for guidelines on how to ensure good RF performance
32VSS_PAPowerGround (radio supply)
33DEC6Power1.3 V regulator supply decouplingMust be connected to DEC4 (pin 46)
34DEC3PowerPower supply, decoupling
35XC1Analog inputConnection for 32 MHz crystal
36XC2Analog inputConnection for 32 MHz crystal
Top side of the chip
37VDDPowerPower supply
38P1.15Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
39

P0.03

AIN1

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
40

P0.02

AIN0

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
41

P0.28

AIN4

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
42

P0.29

AIN5

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
43

P0.30

AIN6

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
44

P0.31

AIN7

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
45VSSPowerGround
46DEC4Power1.3 V regulator supply decouplingMust be connected to DEC6 (pin 33)
47DCCPowerDC/DC converter output
48VDDPowerPower supply
Backside of the chip
Die padVSSPowerGround padExposed die pad must be connected to ground (VSS) for proper device operation

WLCSP ball assignments

The ball assignment figure and table describe the assignments for this variant of the chip.

Figure 3. WLCSP ball assignments, top view

WLCSP ball assignments

Table 3. WLCSP ball assignments
PinNameFunctionDescriptionRecommended usage
A1XC1Analog inputConnection for 32 MHz crystal
A2XC2Analog inputConnection for 32 MHz crystal
A3P1.11Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
A4P1.13Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
A5

P0.03

AIN1

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A6

P0.28

AIN4

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A7

P0.30

AIN6

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
A8DEC4Power

1.3 V regulator supply decoupling

Must be connected to DEC6 (pin C2)

A9DCCPowerDC/DC converter output
A10DEC1Power1.1 V regulator supply decoupling
B3VDDPowerPower supply
B4P1.10Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
B5P1.14Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
B6

P0.02

AIN0

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
B7VSSPowerGround
B8VDDPowerPower supply
B9

P0.00

XL1

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

B10

P0.01

XL2

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

C1VSS_PAPowerGround (radio supply)
C2DEC6Power

1.3 V regulator supply decoupling

Must be connected to DEC4 (pin A8)

C4VSSPowerGround
C5P1.12Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
C6P1.15Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
C7

P0.29

AIN5

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
C8

P0.31

AIN7

Digital I/O

Analog input

General purpose I/O

Analog input

Standard drive, low frequency I/O only
C9P0.26Digital I/OGeneral purpose I/O
C10

P0.04

AIN2

Digital I/O

Analog input

General purpose I/O

Analog input

D3VSSPowerGround
D4VSSPowerGround
D5VSSPowerGround
D6VSSPowerGround
D7VSSPowerGround
D8VSSPowerGround
D9P0.27Digital I/OGeneral purpose I/O
D10

P0.05

AIN3

Digital I/O

Analog input

General purpose I/O

Analog input

E1ANTRFSingle-ended radio antenna connectionSee Reference circuitry for guidelines on how to ensure good RF performance
E2

P0.10

NFC2

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
E3P1.06Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
E4VSSPowerGround
E5VSSPowerGround
E6VSSPowerGround
E7VSSPowerGround
E8VSSPowerGround
E9P0.06Digital I/OGeneral purpose I/O
E10P0.08Digital I/OGeneral purpose I/O
F1

P0.09

NFC1

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

Standard drive, low frequency I/O only
F2

DEC5

Not connected

Power

1.3 V regulator supply decoupling for build codes Dxx and earlier.

Not connected for build codes Fxx and later.

F3P1.03Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
F4VSSPowerGround
F5VSSPowerGround
F6VSSPowerGround
F7VSSPowerGround
F8VSSPowerGround
F9

P0.07

TRACECLK

Digital I/O

Trace clock

General purpose I/O

Trace buffer clock

F10

P1.09

TRACEDATA3

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[3]

G1P1.07Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
G2P1.05Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
G3P1.02Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
G4VSSPowerGround
G5VSSPowerGround
G6VSSPowerGround
G7VSSPowerGround
G8VSSPowerGround
G9P1.08Digital I/OGeneral purpose I/O
G10

P0.12

TRACEDATA1

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[1]

H1P1.04Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
H2SWDCLKDigital inputSerial wire debug clock input for debug and programming
H4P0.24Digital I/OGeneral purpose I/O
H5P0.23Digital I/OGeneral purpose I/OQSPI
H6P0.16Digital I/OGeneral purpose I/O
H7P0.13Digital I/OGeneral purpose I/O
H8

P0.11

TRACEDATA2

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[2]

H9DCCHPowerDC/DC converter output
H10VDDPowerPower supply
J1P1.01Digital I/OGeneral purpose I/OStandard drive, low frequency I/O only
J2SWDIODigital I/OSerial wire debug I/O for debug and programming
J3

P1.00

TRACEDATA0

Digital I/O

Trace data

General purpose I/O

Trace buffer TRACEDATA[0]

Serial wire output (SWO)

QSPI
J4P0.21Digital I/OGeneral purpose I/OQSPI
J5P0.20Digital I/OGeneral purpose I/O
J6P0.17Digital I/OGeneral purpose I/O
J7P0.14Digital I/OGeneral purpose I/O
J8D-USBUSB D-
J9VBUSPower5 V input for USB 3.3 V regulator
J10VDDHPowerHigh voltage power supply
K1VDDPowerPower supply
K2P0.25Digital I/OGeneral purpose I/O
K3P0.22Digital I/OGeneral purpose I/OQSPI
K4P0.19Digital I/OGeneral purpose I/OQSPI/SCK
K5VDDPowerPower supply
K6

P0.18

nRESET

Digital I/O

General purpose I/O

Configurable as pin reset

QSPI/CSN
K7P0.15Digital I/OGeneral purpose I/O
K8D+USBUSB D+
K9DECUSBPowerUSB 3.3 V regulator supply decoupling
K10VSSPowerGround
Note: For more information on standard drive, see GPIO — General purpose input/output. Low frequency I/O is a signal with a frequency up to 10 kHz.