Memory

The network core contains flash memory and RAM that can be used for code and data storage.

The following figure shows how the CPU and peripherals with EasyDMA can access RAM via the AHB multilayer interconnect.

The network core can access application core resources (flash, RAM, and peripherals) when granted permission through the application's DCNF and SPU settings. A small portion of the application core RAM is dedicated to the exchange of messages between the application and network cores.

Figure 1. Memory layout

Memory layout

Peripheral instantiation

The following table describes the abbreviations used in the Instance, Secure mapping, and DMA security columns of the instantiation table.

Table 1. Instantiation table abbreviations
AbbreviationDescription
NSTrustzone/security attribute is Non-secure - The peripheral is accessible as a Non-secure peripheral.
STrustzone/security attribute is Secure - The peripheral is accessible as a Secure peripheral.
USTrustzone Map is user selectable - The Trustzone/security attribute of the peripheral can be configured using SPU — System protection unit.
HFTrustzone Map is hardware fixed - The Trustzone/security attribute of the peripheral cannot be changed.
NANot Applicable - Peripheral has no DMA capability.
NSANoSeparateAttribute - Peripheral with DMA and DMA transfer has the same security attribute as assigned to the peripheral.
SASeparateAttribute - Peripheral with DMA and DMA transfers can have a different security attribute than the one assigned to the peripheral.

The Secure mapping column in the following table defines configuration capabilities for the Arm® TrustZone® for Armv8-M secure attribute. The DMA security column describes the DMA capabilities of the peripheral.

Instantiation

Table 2. Instantiation table
IDBase addressInstanceTrustZoneSplit accessDescription
MapAttDMA
00x41000000DCNF

HF

NS

NANo

Domain configuration

40x41004000VREQCTRL

HF

NS

NANo

Voltage request control

50x41005000CLOCK

HF

NS

NANo

Clock control

50x41005000POWER

HF

NS

NANo

Power control

50x41005000RESET

HF

NS

NANo

Reset status

60x41006000CTRLAP

HF

NS

NANo

Control access port CPU side

80x41008000RADIO

HF

NS

NANo

2.4 GHz radio

90x41009000RNG

HF

NS

NANo

Random number generator

100x4100A000GPIOTE

HF

NS

NANo

GPIO tasks and events

110x4100B000WDT

HF

NS

NANo

Watchdog timer

120x4100C000TIMER0

HF

NS

NANo

Timer 0

130x4100D000ECB

HF

NS

NANo

AES electronic code book (ECB) mode block encryption

140x4100E000AAR

HF

NS

NANo

Accelerated address resolver

140x4100E000CCM

HF

NS

NANo

AES counter with CBC-MAC (CCM) mode block encryption

150x4100F000DPPIC

HF

NS

NANo

DPPI controller

160x41010000TEMP

HF

NS

NANo

Temperature sensor

170x41011000RTC0

HF

NS

NANo

Real-time counter 0

180x41012000IPC

HF

NS

NANo

Interprocessor communication

190x41013000SPIM0

HF

NS

NANo

SPI master 0

190x41013000SPIS0

HF

NS

NANo

SPI slave 0

190x41013000TWIM0

HF

NS

NANo

Two-wire interface master 0

190x41013000TWIS0

HF

NS

NANo

Two-wire interface slave 0

190x41013000UARTE0

HF

NS

NANo

Universal asynchronous receiver/transmitter

200x41014000EGU0

HF

NS

NANo

Event generator unit 0

220x41016000RTC1

HF

NS

NANo

Real-time counter 1

240x41018000TIMER1

HF

NS

NANo

Timer 1

250x41019000TIMER2

HF

NS

NANo

Timer 2

260x4101A000SWI0

HF

NS

NANo

Software interrupt 0

270x4101B000SWI1

HF

NS

NANo

Software interrupt 1

280x4101C000SWI2

HF

NS

NANo

Software interrupt 2

290x4101D000SWI3

HF

NS

NANo

Software interrupt 3

1280x41080000ACL

HF

NS

NANo

Access control lists

1280x41080000NVMC

HF

NS

NANo

Non-Volatile Memory Controller

1290x41081000VMC

HF

NS

NANo

Volatile memory controller

1920x418C0500P0

HF

NS

NANo

General purpose input and output

1920x418C0800P1

HF

NS

NANo

General purpose input and output

N/A0x01FF0000FICR

HF

NS

NANo

Factory information configuration

N/A0x01FF8000UICR

HF

NS

NANo

User information configuration

N/A0xE0042000CTI

HF

NS

NANo

Cross-trigger interface