DCNF — Domain configuration

The domain configuration (DCNF) peripheral enables identification of the CPU by its CPU ID in the device (CPUID). It also provides protection of the AHB multilayer interconnect (AMLI).

AMLI protection is enabled through the DCNF configuration registers that can block some paths from the AHB masters to their respective AHB slaves in the AMLI.

For an illustration of how the AHB masters and slaves are connected through the AMLI, see Memory.

Protection

DCNF protection blocks the path of AHB masters in an external core from accessing AHB slaves in the AMLI of the local core. Essentially, blocking external core access to internal resources of the local core.

The following figure is a simplified version of the AMLI that shows the set of configuration registers used to control this behavior. A more detailed AMLI figure can be found in Memory.

Figure 1. Domain configuration

The DCNF configuration registers that enable the DCNF protection are the following:

An attempt to access the blocked resources will trigger a BusFault or a HardFault exception, depending on the value of the BUSFAULTENA bit in the Arm® Cortex®-M33 SHCSR (system handler control and state register). This is described in the Arm Cortex-M33 Devices Generic User Guide.

RAM protection

RAM regions are protected by configuring the SLAVE bits in the register EXTRAM[n].PROTECT of the equivalent master port.

Peripheral protection

Peripheral memory regions are protected by configuring the SLAVE bits in the register EXTPERI[n].PROTECT of the equivalent master port.

Code protection

Code memory regions are protected by configuring the SLAVE bits in the register EXTCODE[0].PROTECT of the equivalent master port.

Registers

Instances


Instance	Domain	Base address	TrustZone			Split access	Description
Instance	Domain	Base address	Map	Att	DMA	Split access	Description
DCNF : S DCNF : NS	APPLICATION	0x50000000 0x40000000	US	S	NA	No	Domain configuration
DCNF	NETWORK	0x41000000	HF	NS	NA	No	Domain configuration

Configuration


Instance	Domain	Configuration
DCNF : S DCNF : NS	APPLICATION	CPUID value is 0x00000000
DCNF	NETWORK	Registers EXTPERI[n].PROTECT, EXTRAM[n].PROTECT, and EXTCODE[n].PROTECT not available for the network core. CPUID value is 0x00000001

Register overview


Register	Offset	Description
CPUID	0x420	CPU ID of this subsystem
EXTPERI[n].PROTECT	0x440	Control access for master connected to AMLI master port EXTPERI[n]
EXTRAM[n].PROTECT	0x460	Control access from master connected to AMLI master port EXTRAM[n]
EXTCODE[n].PROTECT	0x480	Control access from master connected to AMLI master port EXTCODE[n]

CPUID

Address offset: 0x420

CPU ID of this subsystem


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																												A	A	A	A	A	A	A	A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	R	CPUID										CPU ID

EXTPERI[n].PROTECT (n=0..0)

Address offset: 0x440 + (n × 0x4)

Control access for master connected to AMLI master port EXTPERI[n]


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																																			A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	SLAVE[i] (i=0..0)										Control access to slave i of master EXTPERI[n]
			Allowed	0								Access to slave is allowed
			Blocked	1								Access to slave is blocked

EXTRAM[n].PROTECT (n=0..0)

Address offset: 0x460 + (n × 0x4)

Control access from master connected to AMLI master port EXTRAM[n]


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																												H	G	F	E	D	C	B	A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A-H	RW	SLAVE[i] (i=0..7)										Control access to slave i of master EXTRAM[n]
			Allowed	0								Access to slave is allowed
			Blocked	1								Access to slave is blocked

EXTCODE[n].PROTECT (n=0..0)

Address offset: 0x480 + (n × 0x4)

Control access from master connected to AMLI master port EXTCODE[n]


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																																			A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	SLAVE[i] (i=0..0)										Control access to slave i of master EXTCODE[n]
			Allowed	0								Access to slave is allowed
			Blocked	1								Access to slave is blocked