nRF54L15 | nRF54L10 | nRF54L05 Datasheet
nRF54L15, nRF54L10, and nRF54L05 are a part of the nRF54L Series. All wireless System-on-Chip (SoC) options in the series integrate an ultra-low power, multiprotocol 2.4 GHz radio with MCU (Microcontroller Unit) functionality featuring a 128 MHz Arm® Cortex®-M33 processor. nRF54L15, nRF54L10, and nRF54L05 make up a flexible set of SoCs enabling multiple product categories with an extended peripheral set and scalable memory configurations.
Nordic Semiconductor’s proprietary technologies, such as low-leakage RAM and advanced multiprotocol radio design, enable ultra-low power consumption, reducing battery size or increasing lifetime.
Designed with versatility in mind, the nRF54L Series SoCs are suited to enable a broad range of applications. The multiprotocol 2.4 GHz radio supports Bluetooth® LE with optional features including Channel Sounding, introduced in Bluetooth Core 6.0, as well as 802.15.4-2020 for standards such as Thread®, Matter, and Zigbee®, and a proprietary 2.4 GHz mode supporting up to 4 Mbps for higher throughput. The devices integrate peripherals expected in a wireless microcontroller, enabling many products to be implemented with a single chip. An integrated RISC-V coprocessor further reduces the need for external ICs.
nRF54L15, nRF54L10, and nRF54L05 are available in a range of memory and package configurations, including pin-to-pin compatible QFN packages, enabling cost-optimized and flexible design across different application requirements.
- 128 MHz Arm Cortex-M33 processor
- Scalable memory configurations from 500 KB up to 1524 KB NVM and 96 KB up to 256 KB RAM
- Multiprotocol 2.4 GHz radio supporting Bluetooth LE, 802.15.4-2020, and 2.4 GHz proprietary modes (up to 4 Mbps)
- Five serial interfaces (SPI/TWI/UART) including high-speed support
- Extended set of interfaces, peripherals, and timers including Global RTC available in System OFF, 14-bit ADC, I2S, PDM, NFC, PWM, and QDEC
- 128 MHz RISC-V coprocessor
- Advanced security including TrustZone® isolation, tamper detection, and cryptographic engine with side-channel leakage protection
- Ultra-compact CSP and QFN packages
Radio
| Peripherals
| GPIO
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Chapters
- Revision history
- About this document
- Document status
- Peripheral chapters
- Register overview table
- Register tables
- Registers
- Product overview
- Block diagram
- Memory and package overview
- Power domains
- Address format
- Memory
- CPU
- CPUC — CPU control
- Instantiation
- AMBA interconnect (AMBIX)
- EasyDMA
- CACHE — Instruction/data cache
- FICR — Factory information configuration registers
- MEMCONF — Memory configuration
- RRAMC — Resistive random access memory controller
- SICR — Secure information configuration region
- SWI — Software interrupts
- UICR — User information configuration registers
- Power and clock management
- System ON mode
- System OFF mode
- Power supply supervisors
- CLOCK — Clock control
- OSCILLATORS — Oscillator control
- POWER — Power control
- REGULATORS — Regulator control
- RESET — Reset control
- Event system
- DPPI latencies
- DPPI — Distributed programmable peripheral interconnect
- PPIB — PPI Bridge
- Security
- Memory and peripheral access permissions
- TrustZone security
- Immutable boot region
- Security attributes
- Security fault
- Peripherals with split security access
- Physical security
- CRACEN — Cryptographic accelerator engine
- GLITCHDET — Voltage glitch detectors
- KMU — Key management unit
- MPC — Memory Privilege Controller
- SPU — System protection unit
- TAMPC — Tamper controller
- Peripherals
- Peripheral interface
- Instantiation
- AAR — Accelerated address resolver
- CCM — AES CCM mode encryption
- COMP — Comparator
- ECB — AES electronic codebook mode encryption
- EGU — Event generator unit
- GPIO — General purpose input/output
- GPIOTE — GPIO tasks and events
- GRTC — Global real-time counter
- I2S — Inter-IC sound interface
- LPCOMP — Low-power comparator
- NFCT — Near field communication tag
- PDM — Pulse density modulation interface
- PWM — Pulse width modulation
- QDEC — Quadrature decoder
- RADIO — 2.4 GHz radio
- SAADC — Successive approximation analog-to-digital converter
- SPIM — Serial peripheral interface controller with EasyDMA
- SPIS — Serial peripheral interface target with EasyDMA
- TEMP — Temperature sensor
- TIMER — Timer/counter
- TWIM — I2C compatible two-wire interface controller with EasyDMA
- TWIS — I2C compatible two-wire interface target with EasyDMA
- UARTE — Universal asynchronous receiver/transmitter with EasyDMA
- VPR — RISC-V CPU
- WDT — Watchdog timer
- Debug and trace
- Debug access port
- Access port protection
- Debug Interface mode
- Real-time debug
- Trace
- CTRL-AP — Control access port
- TAD — Trace and debug control
- ETM — Embedded trace macrocell
- TPIU — Trace port interface unit
- Pin assignments
- QFN40 (QDAA) package
- QFN48 (QFAA) package
- QFN52 (QGAA) package
- CSP47 (CAAA) package
- Reference circuitry
- Package thermal characteristics
- Radio equivalence
- Current consumption
- CLOCK Electrical specification
- COMP Electrical specification
- CPU Electrical specification
- GPIO Electrical specification
- I2S Electrical specification
- LPCOMP Electrical specification
- NFCT Electrical specification
- OSCILLATORS Electrical specification
- PPI Electrical specification
- PDM Electrical specification
- QDEC Electrical specification
- RADIO Electrical specification
- REGULATORS Electrical specification
- RESET Electrical specification
- RRAMC Electrical specification
- SAADC Electrical specification
- SPIM Electrical specification
- SPIS Electrical specification
- SWDP Electrical specification
- TEMP Electrical specification
- TWIM Electrical specification
- TWIS Electrical specification
- UARTE Electrical specification
- WDT Electrical specification
- Recommended operating conditions
- Extended operating temperature
- CSP light sensitivity
- Absolute maximum ratings
- Device marking
- Order code
- Code ranges and values
- Product options
- Preprogrammed firmware
- Legal notices