LPCOMP — Low-power comparator

The LPCOMP peripheral compares an input voltage (VIN+) from an analog input pin selected via the PSEL register, against a reference voltage (VIN-) selected via registers REFSEL and EXTREFSEL.

The PSEL, REFSEL, and EXTREFSEL registers must be configured before LPCOMP is enabled through the ENABLE register.

The HYST register allows enabling an optional hysteresis in the comparator core. This hysteresis prevents noise on the signal, which would create unwanted events. The following figure illustrates the effect of an active hysteresis on a noisy input signal. It is disabled by default, and must be configured before enabling LPCOMP.

LPCOMP is started by triggering the START task. After a startup time of t_{LPCOMP,STARTUP}, LPCOMP generates a READY event to indicate that the comparator is ready to use and the output of LPCOMP is correct. LPCOMP generates events every time VIN+ crosses VIN-. More specifically, every time VIN+ rises above VIN- (upward crossing), an UP event and CROSS event are generated. Every time VIN+ falls below VIN- (downward crossing), a DOWN event and CROSS event are generated. When hysteresis is enabled, the upward crossing level becomes VIN- + VHYST/2, and the downward crossing level becomes VIN- - VHYST/2.

LPCOMP is stopped by triggering the STOP task.

LPCOMP is operational in both System ON and System OFF mode when enabled through the ENABLE register. See POWER — Power control for more information about power modes. Entering System OFF is not allowed when a READY event is pending to be generated.

All LPCOMP registers, including ENABLE, are classified as retained registers when the LPCOMP is enabled. However, when the device wakes up from System OFF, all LPCOMP registers are reset.

LPCOMP can wake up the system from System OFF by asserting the ANADETECT signal. The ANADETECT signal can be derived from any of the event sources that generate UP, DOWN, and CROSS events. If wakeup from System OFF occurs, only the ANADETECT signal is generated. See the ANADETECT register (ANADETECT) for more information on configuring the ANADETECT signal.

The immediate value of the LPCOMP can be sampled to RESULT by triggering the SAMPLE task.

See RESETREAS for more information on how to detect a wakeup from LPCOMP.

LPCOMP shares analog resources with SAADC. While it is possible to use the SAADC at the same time as the LPCOMP, selecting the same analog input pin for both modules is not supported.

Additionally, LPCOMP shares registers and other resources with other peripherals that have the same ID as the LPCOMP. See Peripherals with shared ID for more information.

The LPCOMP peripheral should not be disabled (by writing to the ENABLE register) before the peripheral has stopped. Failing to do so may result in unpredictable behavior.

The LPCOMP.PSEL register is used to select an analog input pin for LPCOMP. The pins available are AIN0 through AIN7.

See GPIO — General purpose input/output for more information about the pins. Similarly, you can use EXTREFSEL to select one of the analog reference input pins, AIN0 and AIN1, as input for AREF if it is selected in EXTREFSEL. The selected analog pins are acquired by LPCOMP when it is enabled through ENABLE.