PDM Electrical specification

PDM Electrical Specification

SymbolDescriptionMin.Typ.Max.Units
fPDM,CLK,64

PDM clock speed. PDMCLKCTRL = Default (Setting needed for 16 kHz sample frequency @ RATIO = Ratio64)

1.032MHz
fPDM,CLK,80

PDM clock speed. PDMCLKCTRL = 1280K (Setting needed for 16 kHz sample frequency @ RATIO = Ratio80)

1.280MHz
tPDM,JITTER

Jitter in PDM clock output

ns
TdPDM,CLK

PDM clock duty cycle

405060%
tPDM,DATA

Decimation filter delay

5ms
tPDM,s

Data setup time

41ns
tPDM,h

Data hold time

0ns
GPDM,default

Default (reset) absolute gain of the PDM module

0dB
Figure 1. PDM timing diagram
PDM timing diagram