nRF54LC10A Preliminary Datasheet
- nRF54LC10A Preliminary Datasheet v0.6 [PDF]
nRF54LC10A is part of the nRF54L Series of wireless System-on-Chips (SoCs). Every device in the series integrates an ultra-low power 2.4 GHz radio with MCU (Microcontroller Unit) functionality featuring a 128 MHz Arm® Cortex®-M33 processor.
nRF54LC10A is designed for applications requiring multiprotocol radio and only an essential peripheral set such as asset trackers, tags, radio coprocessor in larger systems, or 802.15.4 networked sensor nodes. For devices with enclosed batteries, the system hibernation mode extends shelf life.
Nordic Semiconductor's proprietary technologies, such as low-leakage RAM and advanced multiprotocol radio design, enable ultra-low power consumption, reducing battery size or extending battery life.
Designed with versatility in mind, the nRF54L Series SoCs enable a broad range of applications. The multiprotocol 2.4 GHz radio supports Bluetooth® LE with optional features including Channel Sounding introduced in Bluetooth Core 6.0, as well as 802.15.4-2020 for standards such as Thread®, Matter, and Zigbee®, and a proprietary 2.4 GHz mode supporting up to 4 Mbps for higher throughput.
nRF54LC10A is available in two 1.9x2.3 mm CSP packages for demanding, size-constrained products, and a QFN package.
- 128 MHz Arm Cortex-M33 processor
- 1012 KB NVM and 192 KB RAM
- Multiprotocol 2.4 GHz radio supporting Bluetooth LE, 802.15.4-2020, and 2.4 GHz proprietary modes (up to 4 Mbps)
- Three serial interfaces (SPI/TWI/UART)
- Essential set of peripherals and timers including Global RTC available in System OFF and ADC
- 128 MHz RISC-V coprocessor
- Advanced security including TrustZone® isolation, tamper detection, and cryptographic engine side-channel leakage protection
- Supply and GPIO voltage of 1.7 V to 3.6 V
- <50 nA hibernation mode
- Ultra-compact 1.9x2.3 mm CSP package and a QFN package
Radio
| Peripherals
| GPIO
|
Chapters
- Revision history
- About this document
- Document status
- Peripheral chapters
- Register overview table
- Register tables
- Registers
- Product overview
- Block diagram
- Product overview
- Power domains
- Address format
- Memory
- CPU
- CPUC — CPU control
- Instantiation
- AMBA interconnect (AMBIX)
- EasyDMA
- CACHE — Instruction/data cache
- FICR — Factory information configuration registers
- MEMCONF — Memory configuration
- RRAMC — Resistive random access memory controller
- SICR — Secure information configuration region
- SWI — Software interrupts
- UICR — User information configuration registers
- Power and clock management
- System ON mode
- System OFF mode
- System Hibernation mode
- Power supply supervisors
- CLOCK — Clock control
- OSCILLATORS — Oscillator control
- POWER — Power control
- REGULATORS — Regulator control
- RESET — Reset control
- Event system
- DPPI latencies
- DPPI — Distributed programmable peripheral interconnect
- PPIB — PPI Bridge
- Security
- Memory and peripheral access permissions
- TrustZone security
- Immutable boot region
- Security attributes
- Security fault
- Peripherals with split security access
- Physical security
- CRACEN — Cryptographic accelerator engine
- GLITCHDET — Voltage glitch detectors
- KMU — Key management unit
- MPC — Memory Privilege Controller
- SPU — System protection unit
- TAMPC — Tamper controller
- Peripherals
- Peripheral interface
- Instantiation
- AAR — Accelerated address resolver
- CCM — AES CCM mode encryption
- COMP — Comparator
- ECB — AES electronic codebook mode encryption
- EGU — Event generator unit
- GPIO — General purpose input/output
- GPIOTE — GPIO tasks and events
- GRTC — Global real-time counter
- LPCOMP — Low-power comparator
- RADIO — 2.4 GHz radio
- SAADC — Successive approximation analog-to-digital converter
- SPIM — Serial peripheral interface controller with EasyDMA
- SPIS — Serial peripheral interface target with EasyDMA
- TEMP — Temperature sensor
- TIMER — Timer/counter
- TWIM — I2C compatible two-wire interface controller with EasyDMA
- TWIS — I2C compatible two-wire interface target with EasyDMA
- UARTE — Universal asynchronous receiver/transmitter with EasyDMA
- VPR — RISC-V CPU
- WDT — Watchdog timer
- Debug and trace
- Debug access port
- Access port protection
- Debug Interface mode
- Real-time debug
- Multidrop serial wire debug
- Trace
- CTRL-AP — Control access port
- TAD — Trace and debug control
- ETM — Embedded trace macrocell
- TPIU — Trace port interface unit
- Pin assignments
- QFN48 6x6 mm package
- CSP29 (CAAA) package
- CSP39 (CBAA) package
- Reference circuitry
- Reflow conditions
- Electrical specifications
- Conditions
- Current consumption
- CLOCK Electrical specification
- CPU Electrical specification
- GPIO Electrical specification
- OSCILLATORS Electrical specification
- PPI Electrical specification
- REGULATORS Electrical specification
- RRAMC Electrical specification
- SPIM Electrical specification
- SPIS Electrical specification
- SWDP Electrical specification
- TWIM Electrical specification
- TWIS Electrical specification
- UARTE Electrical specification
- WDT Electrical specification
- Recommended operating conditions
- CSP light sensitivity
- Absolute maximum ratings
- Device marking
- Order code
- Code ranges and values
- Product options
- Preprogrammed firmware
- Legal notices