Debug access port
An external debugger can access the device through the debug access port (DAP).
The DAP implements a standard serial wire debug (SWD) Arm CoreSight™ protocol with a two-pin serial interface (SWDCLK and SWDIO).
The SWDIO pin has an internal pull-up resistor. The SWDCLK pin has an internal pull-down resistor.
There are several access ports for connecting to different parts of the system, as shown in the following table.
| AP ID | Type | Description |
|---|---|---|
| 0 | AHB-AP | CM33 access port |
| 1 | AHB-AP | AUX access port |
| 2 | CTRL-AP | Control access port |
The AHB-AP is a standard Arm component. See the ArmCoreSight SoC-400 Technical Reference Manual for more information. The control access port (CTRL-AP) is proprietary and described in more detail in CTRL-AP — Control access port.
Debug access port registers
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| TARGETID | 0x024 | The TARGETID register provides information about the target when the host is connected to a single device. The TARGETID register is accessed by a read of DP register 0x4 when the DPBANKSEL bit in the SELECT register is set to 0x2. | |
| DLPIDR | 0x034 | The DLPIDR register provides information about the serial wire debug protocol version. Accessed by a read of DP register 0x4 when the DPBANKSEL bit in the SELECT register is set to 0x3. |
TARGETID
Address offset: 0x024
The TARGETID register provides information about the target when the host is connected to a single device.
The TARGETID register is accessed by a read of DP register 0x4 when the DPBANKSEL bit in the SELECT register is set to 0x2.
| Bit number | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ID | C | C | C | C | B | B | B | B | B | B | B | B | B | B | B | B | A | A | A | A | A | A | A | A | A | A | A | ||||||||
| Reset 0x00000289 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | |||
| ID | R/W | Field | Value ID | Value | Description | ||||||||||||||||||||||||||||||
| A | R | TDESIGNER | An 11-bit code JEDEC JEP106 continuation code and identity code. The ID identifies the designer of the part. | ||||||||||||||||||||||||||||||||
NordicSemi | 0x144 | Nordic Semiconductor ASA. | |||||||||||||||||||||||||||||||||
| B | R | TPARTNO | Part number. | ||||||||||||||||||||||||||||||||
| C | R | TREVISION | Target revision. | ||||||||||||||||||||||||||||||||
DLPIDR
Address offset: 0x034
The DLPIDR register provides information about the serial wire debug protocol version.
Accessed by a read of DP register 0x4 when the DPBANKSEL bit in the SELECT register is set to 0x3.
| Bit number | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ID | B | B | B | B | A | A | A | A | |||||||||||||||||||||||||||
| Reset 0x00000001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |||
| ID | R/W | Field | Value ID | Value | Description | ||||||||||||||||||||||||||||||
| A | R | PROTVSN | Protocol version. | ||||||||||||||||||||||||||||||||
SWDPv2 | 1 | SW protocol version 2. | |||||||||||||||||||||||||||||||||
| B | R | TINSTANCE | Target instance. | ||||||||||||||||||||||||||||||||