SPIM Electrical specification

Timing specifications

SymbolDescriptionMin.Typ.Max.Units
fSPIM

Bit rates for SPIM7

8Mbps
fSPIM,HS

Bit rates for high-speed SPIM instances8

329Mbps
tSPIM,START

Time from START task to transmission started

1µs
tSPIM,CSCK

SCK period

31.25ns
tSPIM,RSCK,LD

SCK rise time, standard drivea

tRF,25pF
tSPIM,RSCK,HD

SCK rise time, high drivea

tHRF,25pF
tSPIM,FSCK,LD

SCK fall time, standard drivea

tRF,25pF
tSPIM,FSCK,HD

SCK fall time, high drivea

tHRF,25pF
tSPIM,WHSCK

SCK high timea

(tCSCK/2) - tRSCK - 1.5 ns
tSPIM,WLSCK

SCK low timea

(tCSCK/2) - tFSCK - 1.5 ns
Figure 13. SPIM timing diagram
SPI master timing diagram
7 High bit rates may require GPIOs to be set as High Drive or Extra High Drive, see GPIO chapter for more details.
8 High bit rates may require GPIOs to be set as High Drive or Extra High Drive, see GPIO chapter for more details.
9 For SPIM00 using GPIO port P2.
10 At 25pF load, including GPIO pin capacitance, see GPIO spec.

Timing specifications for GPIO port P0 using Standard drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

51ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

12ns
tSPIM,HMO

SDO hold time after CLK edge

-4ns

Timing specifications for GPIO port P0 using High drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

48ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

15ns
tSPIM,HMO

SDO hold time after CLK edge

-6ns

Timing specifications for GPIO port P1 using Standard drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

38ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

5ns
tSPIM,HMO

SDO hold time after CLK edge

-2ns

Timing specifications for GPIO port P1 using High drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

34ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

8ns
tSPIM,HMO

SDO hold time after CLK edge

-6ns

Timing specifications for GPIO port P2 using Standard drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

38ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

5ns
tSPIM,HMO

SDO hold time after CLK edge

-2ns

Timing specifications for GPIO port P2 using High drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

34ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

8ns
tSPIM,HMO

SDO hold time after CLK edge

-6ns

Timing specifications for GPIO port P2 using Extra high drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

13ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

2ns
tSPIM,HMO

SDO hold time after CLK edge

-1ns

Timing specifications for GPIO port P3 using Standard drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

38ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

5ns
tSPIM,HMO

SDO hold time after CLK edge

-3ns

Timing specifications for GPIO port P3 using High drive strength

SymbolDescriptionMin.Typ.Max.Units
tSPIM,SUMI

SDI to CLK edge setup time

35ns
tSPIM,HMI

CLK edge to SDI hold time

0ns
tSPIM,VMO

CLK edge to SDO valid

7ns
tSPIM,HMO

SDO hold time after CLK edge

-5ns