SPIS Electrical specification

SPIS slave interface electrical specifications


Symbol	Description	Min.	Typ.	Max.	Units
f_SPIS	Bit rates for SPIS¹¹			8¹²	Mbps
t_SPIS,START	Time from RELEASE task to receive/transmit (CSN active)		1		µs

¹¹ High bit rates may require GPIOs to be set as High Drive, see GPIO chapter for more details.

¹² The actual maximum data rate depends on the master's CLK to SDO and SDI setup and hold timings.


Symbol	Description	Min.	Max.	Units
t_SPIS,CSCKIN	SCK input period	125		ns
t_SPIS,RFSCKIN	SCK input rise/fall time		30	ns
t_SPIS,WHSCKIN	SCK input high time	30		ns
t_SPIS,WLSCKIN	SCK input low time	30		ns
t_SPIS,SUCSN	CSN to CLK setup time	1000¹³		ns
t_SPIS,HCSN	CLK to CSN hold time	1000		ns
t_SPIS,ASA	CSN to SDO driven		70	ns
t_SPIS,ASO	CSN to SDO valid^¹⁴		1000	ns
t_SPIS,DISSO	CSN to SDO disabled^¹⁴		70	ns
t_SPIS,CWH	CSN inactive time	300		ns

¹³ Excluding any start-up delay for the high frequency clock in low power mode.

¹⁴ At 25pF load, including GPIO capacitance, see GPIO spec.


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		46	ns
t_SPIS,HSO	SDO hold time after CLK edge	5		ns
t_SPIS,SUSI	SDI to CLK edge setup time	17		ns
t_SPIS,HSI	CLK edge to SDI hold time	1		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		43	ns
t_SPIS,HSO	SDO hold time after CLK edge	5		ns
t_SPIS,SUSI	SDI to CLK edge setup time	17		ns
t_SPIS,HSI	CLK edge to SDI hold time	1		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		37	ns
t_SPIS,HSO	SDO hold time after CLK edge	4		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	2		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		33	ns
t_SPIS,HSO	SDO hold time after CLK edge	4		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	2		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		37	ns
t_SPIS,HSO	SDO hold time after CLK edge	4		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	0		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		33	ns
t_SPIS,HSO	SDO hold time after CLK edge	4		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	0		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		13	ns
t_SPIS,HSO	SDO hold time after CLK edge	3		ns
t_SPIS,SUSI	SDI to CLK edge setup time	3		ns
t_SPIS,HSI	CLK edge to SDI hold time	1		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		37	ns
t_SPIS,HSO	SDO hold time after CLK edge	5		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	0		ns


Symbol	Description	Min.	Max.	Units
t_SPIS,VSO	CLK edge to SDO valid		34	ns
t_SPIS,HSO	SDO hold time after CLK edge	5		ns
t_SPIS,SUSI	SDI to CLK edge setup time	5		ns
t_SPIS,HSI	CLK edge to SDI hold time	1		ns