SPIM Electrical specification

Timing specifications


Symbol	Description	Min.	Typ.	Max.	Units
f_SPIM	Bit rates for SPIM¹			8	Mbps
t_SPIM,START	Time from START task to transmission started		1		µs
t_SPIM,CSCK	SCK period	31.25			ns
t_SPIM,RSCK,LD	SCK rise time, standard drive^{^a}			t_RF,25pF
t_SPIM,RSCK,HD	SCK rise time, high drive^{^a}			t_HRF,25pF
t_SPIM,FSCK,LD	SCK fall time, standard drive^{^a}			t_RF,25pF
t_SPIM,FSCK,HD	SCK fall time, high drive^{^a}			t_HRF,25pF
t_SPIM,WHSCK	SCK high time^{^a}	(t_CSCK/2) - t_RSCK - 1.5 ns
t_SPIM,WLSCK	SCK low time^{^a}	(t_CSCK/2) - t_FSCK - 1.5 ns

SPI master timing diagram — Figure 1. SPIM timing diagram

¹ High bit rates may require GPIOs to be set as High Drive or Extra High Drive, see GPIO chapter for more details.

² At 25pF load, including GPIO pin capacitance, see GPIO spec.

Timing specifications for GPIO port P1 using Standard drive strength


Symbol	Description	Min.	Typ.	Max.	Units
t_SPIM,SUMI	SDI to CLK edge setup time	35			ns
t_SPIM,HMI	CLK edge to SDI hold time	0			ns
t_SPIM,VMO	CLK edge to SDO valid			4	ns
t_SPIM,HMO	SDO hold time after CLK edge	-4			ns

Timing specifications for GPIO port P1 using High drive strength


Symbol	Description	Min.	Typ.	Max.	Units
t_SPIM,SUMI	SDI to CLK edge setup time	32			ns
t_SPIM,HMI	CLK edge to SDI hold time	0			ns
t_SPIM,VMO	CLK edge to SDO valid			7	ns
t_SPIM,HMO	SDO hold time after CLK edge	-6			ns