CLOCK — Clock control

The HFCLK clock controller provides the following clocks to the system.

CPUs, peripherals, and other system components automatically request clocks. The HFCLK control passes the request to the power and clock subsystem. When the clocks are running, the HFCLK control distributes them to the components. The CPU clock frequency can be selected, as described in OSCILLATORS — Oscillator control.

When all HFCLK control requests end, the HFCLK control stops requesting CLOCK from the power and clock subsystem. For example, when the CPU enters sleep or when peripherals have completed their tasks, HFCLK stops CLOCK requests. If there are no requests for HFCLK or PCLK control, the power and clock subsystem automatically stops the clock.

When the system enters System ON mode and an HFCLK clock is requested, the PLL is automatically started. When clock requests stop, the PLL automatically stops.

HFCLK clocks are only available to the HFCLK controllers when the system is in System ON mode.

An HFCLK source can run before being started by the relevant clock request. This reduces start-up time but causes increased power consumption. An example of this would be to keep the PLL running during sleep by using the task PLLSTART.

HFXO must be started when crystal clock accuracy is required. The crystal is started by triggering the task XOSTART. When the crystal reaches the correct amplitude and frequency, the PLL automatically locks to the crystal and generates the event XOSTARTED. At the same time, the crystal oscillator is performing an XOTUNE. When that process finishes, the event XOTUNED is generated indicating the signal from the crystal oscillator is accurately tuned. The XOTUNED event is always generated after the XOSTARTED event. If the XOTUNE process fails, the event XOTUNEFAILED is generated. When that happens, the XOTUNE process must be started by triggering the task XOTUNE. The task XOSTOP will stop the crystal oscillator and the XOTUNE process (if it is running). The XOTUNE process will continue from where it left off, when the XOSTART task is triggered again.

If the crystal oscillator requires the XOTUNE process to be repeated, the device generates the event XOTUNEERROR. When that happens, the XOTUNE task must be triggered. This task does not request the crystal oscillator to start and it only takes effect if the crystal oscillator is already running. Do not trigger this task at the same time that RADIO is running (meaning RADIO must not be in the RX or TX states). A successful XOTUNE process is indicated by the event XOTUNED. If the procedure fails to complete, the XOTUNEFAILED event is generated. When a failure is detected, the XOTUNE process must be repeated. Repeated failures to complete the XOTUNED process indicates a faulty crystal or load capacitors.

A new START task can be initiated after one has already been triggered, but before the corresponding STARTED event is generated. In this case, only one STARTED event will be generated, corresponding to the last triggered START task. Triggering a START task after the STARTED event from a previous triggered START tasks is generated, generates a new STARTED event.

The amount of time between a START task and its corresponding STARTED event may differ depending on whether the HFCLK source is already running or in the process of starting. The amount of time before a STARTED event may vary when a different HFCLK source is configured before triggering a new START task. Different crystal types also have different start-up times, see OSCILLATORS — Oscillator control for details.

HFXO must be running to use RADIO, UARTE, or to calibrate the 32.768 kHz RC oscillator. Using HFXO will also improve SAADC performance by reducing clock jitter. When using serial communication peripherals such as SPIM, SPIS, TWIM, and TWIS, the HFXO must be running to achieve the highest accuracy for the bit rate. When using the internal RC oscillator (HFINT), the frequency accuracy of the serial interface is limited to the accuracy of HFINT, see High frequency clock source (HFCLK).

The system supports the following low frequency clock sources, as described in Clock control.

• 32.768 kHz RC oscillator (LFRC)
• 32.768 kHz crystal oscillator (LFXO)
• 32.768 kHz synthesized from HFCLK (LFSYNT)

LFXO can run in System OFF mode. The other clock sources only run in System ON mode.

The following LF clocks are available in the system.

When a peripheral requires the PCLK32KI clock, the LFCLK control automatically requests the LFCLK clock for the power and clock subsystem. The default LFCLK source is the LFRC.

The LFRC frequency is affected by temperature variation. LFRC can be calibrated to improve accuracy by using HFCLK as a reference oscillator during calibration.

LFCLK uses the calibrated value until the next calibration.