COMP — Comparator

Once enabled through register ENABLE, COMP is started by triggering the START task and stopped by triggering the STOP task. COMP will generate a READY event to indicate when it is ready for use and the output is correct. The delay between START and READY is t_{INT_REF,START} when an internal reference is selected, or t _COMP,START if an external reference is used. When the COMP peripheral is started, events will be generated every time VIN+ crosses VIN-.

COMP can be configured to operate in the two main operation modes, differential mode and single-ended mode. See register MODE for more information. In both operation modes, COMP can operate in different speed and power consumption modes (low-power to high-speed). High-speed mode will consume more power compared to low-power mode. Low-power mode will result in a slower response time compared to high-speed mode.

Use register PSEL to select any of the AIN[0..7] pins as the VIN+ input. The COMP operation mode does not matter. The source of VIN- depends on which operation mode is used.

• Differential mode – Derived directly from pins AIN[0..7].
• Single-ended mode – Derived from VREF. VREF can be derived from AIN[0..7], or internal 1.2 V reference.

The selected analog pins will be acquired by the comparator once it is enabled.

An optional hysteresis on VIN+ and VIN- can be enabled when the module is used in differential mode through the register HYST. In single-ended mode, VUP and VDOWN thresholds can be set to implement a hysteresis using the reference ladder (see Comparator in single-ended mode ). This hysteresis is in the order of magnitude of V_DIFFHYST, and prevents noise on the signal to create unwanted events. See Hysteresis example where VIN+ starts below VUP for an illustration of the effect of an active hysteresis on a noisy input signal.

An upward crossing will generate an UP event and a downward crossing will generate a DOWN event. The CROSS event will be generated every time there is a crossing, independent of direction.

The immediate value of the comparator can be sampled to register RESULT by triggering the SAMPLE task.

A selectable current can be applied through register ISOURCE on the selected AIN[n] line. Enabling the block creates a feedback path around the comparator, forming a relaxation oscillator. The circuit will sink current from VIN+ when the comparator output is high, and source current into VIN+ when the comparator output is low. The frequency of the oscillator is dependent on the capacitance at the analog input pin, the reference voltages, and the value of the current source. In this mode, only a capacitive sensor needs to be attached between the analog input pin and ground. With a selected current of 10 μA, VUP-VDOWN equal to 1 V, and an external capacity of typically 10 pF, the resulting oscillation frequency is around 500 kHz.

f_OSC = I_SOURCE / (2C∙(VUP-VDOWN) )

The COMP shares analog resources with other analog peripherals.

Additionally, COMP shares registers and other resources with other peripherals that have the same ID as the COMP. See Peripherals with shared ID for more information.

The COMP peripheral shall not be disabled (by writing to the ENABLE register) before the peripheral has been stopped. Failing to do so may result in unpredictable behavior.

In differential mode, the reference input VIN- is derived directly from one of the AINx pins.

Before enabling the comparator via the ENABLE register, the following registers must be configured for the differential mode:

• PSEL
• MODE
• EXTREFSEL

When HYST register is turned on while in this mode, the output of the comparator (and associated events) will change from ABOVE to BELOW whenever VIN+ becomes lower than VIN- - (V_DIFFHYST / 2). It will also change from BELOW to ABOVE whenever VIN+ becomes higher than VIN- + (V_DIFFHYST / 2). This behavior is illustrated in Hysteresis enabled in differential mode.

In single-ended mode, VIN- is derived from the reference ladder.

Before enabling the comparator via the ENABLE register, the following registers must be configured for the single-ended mode:

• PSEL
• MODE
• REFSEL
• EXTREFSEL
• TH

The reference ladder uses the reference voltage (VREF) to derive two new voltage references, VUP and VDOWN. VUP and VDOWN are configured using THUP and THDOWN respectively in the TH register. VREF can be derived from any of the available reference sources, configured using the EXTREFSEL and REFSEL registers as illustrated in Comparator in single-ended mode . When AREF is selected in the REFSEL register, the EXTREFSEL register is used to select one of the AIN0-AIN7 analog input pins as reference input. The selected analog pins will be acquired by the comparator once it is enabled.

When the comparator core detects that VIN+ > VIN-, i.e. ABOVE as per the RESULT register, VIN- will switch to VDOWN. When VIN+ falls below VIN- again, VIN- will be switched back to VUP. By specifying VUP larger than VDOWN, a hysteresis can be generated as illustrated in Hysteresis example where VIN+ starts below VUP and Hysteresis example where VIN+ starts above VUP.

Writing to HYST has no effect in single-ended mode, and the content of this register is ignored.