1. Overview of the manual
Legend for Table 1 : the section in each row applies to products in columns marked with “●”
Table 1. Sections related to each STM32F10xxx product
| Reference | Low-density STM32F101xx | Medium-density STM32F101xx | High and XL-density STM32F101xx | Low-density STM32F102xx | Medium-density STM32F102xx | Low-density STM32F103xx | Medium-density STM32F103xx | High and XL-density STM32F103xx | STM32F105xx | STM32F107xx |
|---|---|---|---|---|---|---|---|---|---|---|
| Section 2: Documentation conventions | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 3: Memory and bus architecture | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 4: CRC calculation unit | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 5: Power control (PWR) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 6: Backup registers (BKP) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 7: Low-, medium-, high- and XL-density reset and clock control (RCC) | ● | ● | ● | ● | ● | ● | ● | ● | ||
| Section 8: Connectivity line devices: reset and clock control (RCC) | ● | ● | ||||||||
| Section 9: General-purpose and alternate-function I/Os (GPIOs and AFIOs) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 10: Interrupts and events | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 13: Direct memory access controller (DMA) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 11: Analog-to-digital converter (ADC) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 12: Digital-to-analog converter (DAC) | ● | ● | ● | ● | ||||||
| Section 14: Advanced-control timers (TIM1 and TIM8) | ● | ● | ● | ● | ● | ● | ||||
| Section 15: General-purpose timers (TIM2 to TIM5) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
| Section 16: General-purpose timers (TIM9 to TIM14) | ● (1) | ● (1) | ||||||||
| Section 17: Basic timers (TIM6 and TIM7) | ● | ● | ● | ● | ||||||
| Section 18: Real-time clock (RTC) | ● | ● | ● | ● | ● | ● | ● | ● | ● | ● |
Table 1. Sections related to each STM32F10xxx product (continued)
| Reference | Low-density STM32F101xx | Medium-density STM32F101xx | High and XL-density STM32F101xx | Low-density STM32F102xx | Medium-density STM32F102xx | Low-density STM32F103xx | Medium-density STM32F103xx | High and XL-density STM32F103xx | STM32F105xx | STM32F107xx |
|---|---|---|---|---|---|---|---|---|---|---|
| Section 19: Independent watchdog (IWDG) | • | • | • | • | • | • | • | • | • | • |
| Section 20: Window watchdog (WWDG) | • | • | • | • | • | • | • | • | • | • |
| Section 21: Flexible static memory controller (FSMC) | • | • | ||||||||
| Section 22: Secure digital input/output interface (SDIO) | • | • | ||||||||
| Section 23: Universal serial bus full-speed device interface (USB) | • | • | • | • | • | |||||
| Section 24: Controller area network (bxCAN) | • | • | • | • | • | |||||
| Section 25: Serial peripheral interface (SPI) | • | • | • | • | • | • | • | • | • | • |
| Section 26: Inter-integrated circuit (I2C) interface | • | • | • | • | • | • | • | • | • | • |
| Section 27: Universal synchronous asynchronous receiver transmitter (USART) | • | • | • | • | • | • | • | • | • | • |
| Section 28: USB on-the-go full-speed (OTG_FS) | • | • | ||||||||
| Section 29: Ethernet (ETH): media access control (MAC) with DMA controller | • | |||||||||
| Section 30: Device electronic signature | • | • | • | • | • | • | • | • | • | • |
| Section 31: Debug support (DBG) | • | • | • | • | • | • | • | • | • | • |
1. Available only on XL-density devices.
Legend for Table 2 :
- • The section in this row must be read when using the peripherals in columns with “•”
- ◇ The section in this row can optionally be read when using the peripherals in columns with “◇”
Table 2. Sections related to each peripheral
| Reference | Backup registers (BKP) | General-purpose I/Os (GPIOs) | Analog-to-digital converter (ADC) | Digital-to-analog converter (DAC) | Advanced-control timers (TIM1&TIM8) | General-purpose timers (TIM2 to TIM5) | General-purpose timers (TIM9 to TIM14) | Basic timers (TIM6&TIM7) | Real-time clock (RTC) | Independent watchdog (IWDG) | Window watchdog (WWDG) | Flexible static memory controller | Secure digital input/output interface | USB full-speed device (USB) | Controller area network (bxCAN) | Serial peripheral interface (SPI) | Inter-integrated circuit (I2C) interface | USART | USB on-the-go full-speed (OTG_FS) | Ethernet (ETH) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Section 2: Documentation conventions | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • |
| Section 3: Memory and bus architecture | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • |
| Section 4: CRC calculation unit | ||||||||||||||||||||
| Section 5: Power control (PWR) | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • |
| Section 6: Backup registers (BKP) | • | ◇ | ||||||||||||||||||
| Section 7: Low-, medium-, high- and XL-density reset and clock control (RCC) | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • |
| Section 8: Connectivity line devices: reset and clock control (RCC) | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • |
| Section 9: General-purpose and alternate-function I/Os (GPIOs and AFIOs) | ◇ | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | • | |
| Section 10: Interrupts and events | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ||
| Section 13: Direct memory access controller (DMA) | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | |||||||||
| Section 11: Analog-to-digital converter (ADC) | • |
Table 2. Sections related to each peripheral (continued)
| Reference | Backup registers (BKP) | General-purpose I/Os (GPIOs) | Analog-to-digital converter (ADC) | Digital-to-analog converter (DAC) | Advanced-control timers (TIM1&TIM8) | General-purpose timers (TIM2 to TIM5) | General-purpose timers (TIM9 to TIM14) | Basic timers (TIM6&TIM7) | Real-time clock (RTC) | Independent watchdog (IWDG) | Window watchdog (WWDG) | Flexible static memory controller (FSMC) | Secure digital input/output interface (SDIO) | USB full-speed device (USB) | Controller area network (bxCAN) | Serial peripheral interface (SPI) | Inter-integrated circuit (I2C) interface | USART | USB on-the-go full-speed (OTG_FS) | Ethernet (ETH) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Section 12: Digital-to-analog converter (DAC) | • | |||||||||||||||||||
| Section 14: Advanced-control timers (TIM1 and TIM8) | ◇ | ◇ | • | |||||||||||||||||
| Section 15: General-purpose timers (TIM2 to TIM5) | ◇ | ◇ | • | |||||||||||||||||
| Section 16: General-purpose timers (TIM9 to TIM14) | • | |||||||||||||||||||
| Section 17: Basic timers (TIM6 and TIM7) | ◇ | • | ||||||||||||||||||
| Section 18: Real-time clock (RTC) | • | • | ||||||||||||||||||
| Section 19: Independent watchdog (IWDG) | • | |||||||||||||||||||
| Section 20: Window watchdog (WWDG) | • | |||||||||||||||||||
| Section 21: Flexible static memory controller (FSMC) | • | |||||||||||||||||||
| Section 22: Secure digital input/output interface (SDIO) | • | |||||||||||||||||||
| Section 23: Universal serial bus full-speed device interface (USB) | • | |||||||||||||||||||
| Section 24: Controller area network (bxCAN) | • |
Table 2. Sections related to each peripheral (continued)
| Reference | Backup registers (BKP) | General-purpose I/Os (GPIOs) | Analog-to-digital converter (ADC) | Digital-to-analog converter (DAC) | Advanced-control timers (TIM1&TIM8) | General-purpose timers (TIM2 to TIM5) | General-purpose timers (TIM9 to TIM11) | Basic timers (TIM6&TIM7) | Real-time clock (RTC) | Independent watchdog (IWDG) | Window watchdog (WWDG) | Flexible static memory controller | Secure digital input/output interface | USB full-speed device (USB) | Controller area network (bxCAN) | Serial peripheral interface (SPI) | Inter-integrated circuit (I2C) interface | USART | USB on-the-go full-speed (OTG_FS) | Ethernet (ETH) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Section 25: Serial peripheral interface (SPI) | • | |||||||||||||||||||
| Section 26: Inter-integrated circuit (I2C) interface | • | |||||||||||||||||||
| Section 27: Universal synchronous asynchronous receiver transmitter (USART) | • | |||||||||||||||||||
| Section 28: USB on-the-go full-speed (OTG_FS) | • | |||||||||||||||||||
| Section 29: Ethernet (ETH): media access control (MAC) with DMA controller | • | |||||||||||||||||||
| Section 30: Device electronic signature | ||||||||||||||||||||
| Section 31: Debug support (DBG) | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ | ◇ |